Energy-efficient neural network chips approach human recognition capabilities.

The dream to create novel computing hardware that captures aspects of brain computation has occupied the minds of researchers for over 50 y. Driving goals are to carry both the astounding energy efficiency of computations in neural networks of the brain and their learning capability into future generations of electronic hardware. A realization of this dream has now come one step closer, as reported by Esser et al. (1). The authors demonstrate that a very energy-efficient implementation of an artificial neural network (i.e., of a circuit that shares properties with networks of neurons in the brain) achieves almost the same performance as humans as shown on eight benchmark datasets for recognizing images and sounds. It had previously been shown that somewhat different types of deep artificial neural networks can do this, but these required power-hungry computing hardware, such as graphics processing units (2). A characteristic feature of artificial neural networks is that they cannot be programmed in terms of instructions and variables, the way a traditional computer can. Rather, their computations are determined by a large set of numbers (parameters) that loosely correspond to the strengths (weights) of synapses between neurons in the brain and the excitabilities (biases) of neurons (see the parameters “w” and “b” in Fig. 1). Because these numbers have little meaning for humans, especially not in a large neural network, they are produced through an optimization algorithm that adjusts them in an iterative process. This process aims at minimizing the errors for a concrete computational task, such as classifying visual objects in natural scenes. The architectures and neuron models of artificial neural networks are usually chosen to maximize the performance of particular learning algorithms for particular tasks, and not to make the artificial neural network more similar to biological networks of neurons. The first neural network models, proposed by McCulloch and Pitts (3), were actually designed to capture essential aspects of neural computation in the brain. The underlying neuron model (Fig. 1A) is today referred to as a McCulloch–Pitts neuron or threshold gate. However, it turned out to be difficult to design learning algorithms for networks consisting of several layers of such neurons. This difficulty was caused by the jump of the activation function f between binary outputs 0 and 1. Therefore, this neuron model was replaced in the 1980s (4) by a sigmoidal neuron model with analog outputs (Fig. 1B), where the activation function f interpolates in a smooth differentiablemanner between 0 and 1. The simplest and still most commonly used learning algorithm for this type of neural network is a gradient-descent optimization, which minimizes the errors of the network outputs for a given task. If the activation function of each neuron is differentiable, one can also compute via the chain rule for neurons that do not directly produce a network output, how their parameters should be changed to reduce the errors at the network output. The resulting layerwise application of the chain rule, starting at the output neurons and moving back toward the input layer, is the famous “backprop” (backward propagation of errors) learning algorithm. The transition of the neuron model from A to B in Fig. 1 is actually also meaningful from the perspective of modeling biological neurons. These neurons emit sequences of pulses [called action potentials or spikes (Fig. 1C)], which they send via axons and synaptic connections to other neurons. Because each spike is an all-or-none event, it shares some features with the binary output of a McCulloch–Pitts neuron. But neurons in the brain tend to emit spikes in an unreliable manner. The probability of producing a spike at a given time depends, in standard models for a biological neuron, on its synaptic inputs in a smooth manner. Most approaches for emulating neurons in energyefficient hardware have favored neuron models with discrete outputs, such as the McCulloch–Pitts neuron (Fig. 1A) or the spiking neuron (Fig. 1C). Both of these neurons can be emulated on the TrueNorth chip of IBM (5). The breakthrough reported in Esser et al. (1) arose from the discovery that the parameters of networks of McCulloch–Pitts neurons can also be determined through a variation of the backprop algorithm, despite the nondifferentiability. This discovery came on the shoulders of a better understanding of backprop and its variations. One important aspect of all learning